1. Field of the Invention
The present invention relates generally to techniques for fabrication of electronic devices, and, more specifically, fabrication of non-planar transistors.
2. Description of the Related Art
This section is intended to introduce the reader to various aspects of art that may be related to various aspects of the present invention, which are described and/or claimed below. This discussion is believed to be helpful in providing the reader with background information to facilitate a better understanding of the various aspects of the present invention. Accordingly, it should be understood that these statements are to be read in this light, and not as admissions of prior art.
Fin field effect transistors (finFETs) are often built around a fin (e.g., a tall, thin semiconductive member) extending generally perpendicularly from a substrate. Typically, a gate traverses the fin by conformally running up one side of the fin over the top and down the other side of the fin. Generally, a source and a drain are located on opposite sides of the gate in the fin. In operation, a current through the fin between the source and drain is controlled by selectively energizing the gate.
High aspect ratio fins typically are desirable but challenging to construct. Generally, high aspect ratio finFETS can be integrated into a small area of the substrate, thereby potentially reducing manufacturing costs on a per-transistor basis. Unfortunately, manufacturing fins with a high aspect ratio may present difficulties. During manufacturing, a fin may encounter various mechanical stresses, e.g., inertial forces during movement of the substrate and fluid forces during cleaning steps. If the forces on the fin are too large, the fin may fracture and possibly render a transistor inoperative. High aspect ratio fins may be particularly susceptible to fracturing during manufacture because their height may concentrate larger internal stresses in their relatively narrow base.